zswang's blog

12-02

在 vscode 中進行 verilog simulation

11-02

day9-i2c_master_byte_ctrl 模擬

10-28

day8-i2c_master_byte_ctrl

10-27

day7-i2c-master-bit-ctrl-模擬

10-26

day6-i2c-master_bit_ctrl

10-13

day5-verilog-button-debounce

06-01

day0-HDLbits